In recent years, new microprocessing technologies have been developed along with high-level integration and performance enhancement of LSI. A chemical mechanical polishing (hereinafter, also simply referred to as CMP) method is one of such technologies, and is a technology that is frequently utilized for the flattening of an interlayer insulating film, formation of a metal plug, and formation of embedded wiring (damascene wiring) in an LSI production process, particularly, in a multilayer wiring forming process. This technology is disclosed in, for example, U.S. Pat. No. 4,944,836. With a damascene wiring technology, the wiring process can be simplified and the product yield and reliability can be enhanced.
Further, as one of technologies for reducing power consumption or enhancing performance (operation characteristics) in a transistor, an investigation has been conducted on channels which use a high mobility material that exhibits higher mobility of carriers than that of Si (hereinafter, also simply referred to as “high mobility material”). In channels that have been produced using such a high mobility material and thus have improved transport characteristics of carriers, a drain current can be increased in an On-state. Therefore, a source voltage can be decreased while a sufficient on-current is obtained. This combination brings about superior performance of a metal oxide semiconductor field-effect transistor (MOSFET) at low electric power.
Application of Group III-V compounds, Group IV compounds, germanium (Ge), graphene composed only of carbon (C), and the like as the high mobility material has been anticipated. In particular, application of Group III-V compounds and the like has been positively considered.
Channels that use a high mobility material can be formed by polishing an object to be polished having a portion containing a high mobility material (hereinafter, also referred to as the high mobility material portion) and a portion containing a silicon material (hereinafter, also referred to as the silicon material portion). In this case, it is required to achieve processing of the high mobility material portion into a smooth surface by polishing the portion at a high polishing speed, as well as suppression of the generation of a level difference caused by etching, on the surface after polishing of the object to be polished. For example, JP 2015-523716 W (corresponding to US 2015/175,845 A) discloses a method for manufacturing semiconductor devices in which a III-V material is chemical-mechanically polished.